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Espressif Systems /ESP32-C2 /APB_SARADC /APB_ADC_CLKM_CONF

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Interpret as APB_ADC_CLKM_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0REG_CLKM_DIV_NUM0REG_CLKM_DIV_B 0REG_CLKM_DIV_A 0 (CLK_EN)CLK_EN 0REG_CLK_SEL

Description

register description

Fields

REG_CLKM_DIV_NUM

Integral I2S clock divider value
REG_CLKM_DIV_B

Fractional clock divider numerator value
REG_CLKM_DIV_A

Fractional clock divider denominator value
CLK_EN

Need add description
REG_CLK_SEL

Set this bit to enable clk_apll

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data